PCI Express: Is 85 Ohms Really Needed, or Just a Myth? Here’s What Engineers Should Know
2025-01-08
Blog
Richmon
PCI Express system design often centers around a specific number: 85 Ohms. It’s in the specification, it’s referenced in compliance checklists, and it drives countless design choices in layout and connector selection.
But the question remains—is 85 Ohms always required?
Across many systems—custom backplanes, embedded boards, and high-speed cable assemblies—engineers implement 93 Ohm or even 100 Ohm differential impedance with full compliance.
This article explains what the PCI Express specifications truly require, when deviation is allowed, and how designers can manage signal integrity while maintaining flexibility.
Table of Contents
What the PCIe Spec Actually Says About 85 Ohms
The PCI-SIG CEM (Card Electromechanical) specification calls for 85 Ohm differential impedance on PCB traces. This requirement applies to systems that require full interoperability—such as standard add-in cards and motherboards—where components from different vendors must be interchangeable.
Outside of this use case, engineers have more flexibility. For non-interoperable systems, including captive links, embedded boards, or internal PCIe cables, differential impedance values like 93 or 100 Ohms are acceptable, provided the complete channel still meets PCIe compliance requirements.
Why PCIe Transitioned From 100 Ω to 85 Ω
PCIe Gen2 designs commonly used 100 Ohm differential channels. However, with the introduction of PCIe Gen3 and later generations, signal integrity challenges increased.
Lower impedance offers key advantages:
Wider traces result in reduced skin effect and copper loss.
Better compatibility with dense breakout regions in modern BGA packages.
Improved insertion loss performance at higher frequencies.
These benefits made 85 Ohms a more suitable target for achieving the required margins at 8 GT/s and above.
Impedance Options: 85 Ω, 93 Ω, and 100 Ω in Practice
Compliant PCIe systems often exhibit local impedance excursions as high as 110 Ohms, particularly in areas where contacts are exposed to air, such as connectors. Despite this, many of these systems still meet return-loss and eye-diagram requirements under Gen3 and Gen4 testing.
Differential impedances of 93 to 100 Ohms are frequently used when:
Designers want to simplify co-routing with USB or Ethernet.
System length is short, and the channel is equalized.
High-speed connectors or cables are optimized for values other than 85 Ohms.
This approach is supported by simulation and careful channel engineering.
Table: Common Serial Interface Differential Impedances
| Interface | Typical Zdiff Target | Notes |
|---|---|---|
| PCIe Gen2 | 100 Ω | Common in earlier systems |
| PCIe Gen3+ | 85 Ω | Interoperable CEM requirement |
| USB 3.x | 90 Ω | SuperSpeed signaling |
| Ethernet (1G/10G) | 100 Ω | Widely used backplane standard |
| Mixed-use boards | 93–100 Ω | Common for multi-protocol systems |
PCIe Insertion Loss Budgets and Where 85 Ω Fits
PCIe Gen5 allows a maximum insertion loss of 36 dB at 16 GHz from die pad to die pad. However, a large portion of this is consumed within the processor and endpoint packages.
Typically, the CPU package alone accounts for 9 dB. Endpoint packages may add another 4 dB. This leaves roughly 23 dB for the remaining system components—including the PCB traces, connectors, and any cable assemblies.
Understanding and allocating this loss budget is critical when evaluating whether a deviation from 85 Ohms is acceptable.
Table: PCIe Gen5 Insertion Loss Budget
| Component | Typical Loss @ 16 GHz | Notes |
|---|---|---|
| Total channel (die to die) | 36 dB | Per PCI-SIG Gen5 spec |
| CPU package | 9 dB | Common allocation |
| Endpoint package | 4 dB | Example value |
| Baseboard | 6 dB | Measured in BlueField-3 example |
| Auxiliary card | 1.5 dB | Add-in card contribution |
| Cabline CA-II Plus, 15 cm | 3.8 dB | Based on 0.24 dB/cm at 16 GHz |
| Cabline CA-II Plus, 55 cm | 11.4 dB | Exceeds half the remaining budget |
Engineers must ensure that their channel design—including impedance matching—stays within these budgetary constraints.
How Connector and Cable Impedance Impacts the Channel
In cable-based PCIe implementations, impedance mismatches are more likely to originate from the connector and cable than from the PCB. For example, a connector optimized for 93 Ohms may introduce reflection if paired with a 85 Ohm cable.
Cable impedance should ideally match that of the connector to avoid additional reflection points. In such cases, forcing the cable to 85 Ohms can be detrimental, even if the PCB routing complies with the CEM specification.
For example, a 15 cm CA-II Plus cable segment introduces 3.8 dB of loss, while 55 cm can contribute over 11 dB. The loss budget must be managed carefully, and impedance discontinuities should be minimized across all interconnect elements.
Can I Use 100 Ω for PCIe? When It Works and Why
PCIe channels operating at 100 Ohms can still function correctly under specific conditions. These typically include:
Systems with short channel lengths.
Links where both ends are fixed (non-interoperable).
Channels with high levels of equalization.
Shared routing with other interfaces like Ethernet or USB.
Although 100 Ohms introduces more potential for mismatch, simulation and compliance testing have shown that systems can meet Gen3 or even Gen4 specifications under controlled design environments.
PCB Layout Tips to Hit PCIe Impedance Targets
Achieving 85 Ohms differential impedance in PCB layout involves multiple interdependent variables:
Trace width: Wider traces reduce resistance but impact spacing.
Spacing between differential pairs: Affects coupling and differential impedance.
Single-ended impedance: Typically around 45–46 Ohms per trace for an 85 Ohm pair.
Dielectric constant (Dk): Should be consistent throughout the board stack-up.
Via design: Antipads and layer transitions must be carefully optimized.
In dense BGA regions, it is often easier to meet 85 Ohm targets due to tighter trace spacing and manufacturing constraints. This is one reason why lower impedance became preferable in newer PCIe generations.
85 Ohms is a Target, Not a Rule
While the 85 Ohm specification remains valid and essential for interoperable systems, it is not universally required. Engineers working on embedded systems, captive links, or hybrid interfaces can benefit from choosing impedance values that match their overall system requirements.
Understanding when deviation is acceptable and how to manage insertion loss budgets allows for more flexible, cost-effective, and reliable PCIe designs.
Are you seeking assistance in selecting connectors or cable assemblies tailored for PCIe Gen4, Gen5, or Gen6 systems?
Richmon Industrial (Hong Kong) Ltd. offers full support—no MOQ, sample availability, and connector solutions engineered for signal integrity. Visit www.richmonind.com to explore our services and product portfolio.
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